The present invention relates to a method of forming a micro pattern in a semiconductor device, and more particularly relates to a method of forming a micro pattern in a semiconductor device which forms a micro pattern that is applicable to a process for forming an isolation layer.
As semiconductor devices become more highly-integrated, a dimension of the minimum line width to be embodied becomes reduced. To realize the micro line width required due to the high integration of the device, various processes have been employed.
If an isolation layer is formed using the micro pattern, there is a problem that a critical dimension (CD) becomes un-uniform due to an overlay. In addition, if the micro pattern is formed by a spacer, due to a difficulty of a layout, the micro pattern can be applied to only a simple line and space pattern or a two dimensional cell array having an excellent regularity.